AN 903: Accelerating Timing Closure: in Intel® Quartus® Prime Pro Edition

Download PDF
ID 683664
Date 2/25/2021
Public
Document Table of Contents
Document Table of Contents x
1. AN 903: Accelerating Timing Closure in Intel® Quartus® Prime Pro Edition
1. AN 903: Accelerating Timing Closure in Intel® Quartus® Prime Pro Edition x
1.1. Step 1: Analyze and Optimize Design RTL 1.2. Step 2: Apply Compiler Optimization Techniques 1.3. Step 3: Preserve Satisfactory Results 1.4. AN 903 Document Revision History
1.1. Step 1: Analyze and Optimize Design RTL x
1.1.1. Correct Design Assistant Violations 1.1.2. Reduce Logic Levels 1.1.3. Reduce High Fan-Out Nets
1.2. Step 2: Apply Compiler Optimization Techniques x
1.2.1. Apply Compiler Optimization Modes and Strategies 1.2.2. Reduce Congestion for High Utilization
1.2.2. Reduce Congestion for High Utilization x
1.2.2.1. Experiment with Area and Routability Options 1.2.2.2. Consider Fractal Synthesis for Arithmetic-Intensive Designs
1.2.2.2. Consider Fractal Synthesis for Arithmetic-Intensive Designs x
1.2.2.2.1. Enabling or Disabling Fractal Synthesis
1.3. Step 3: Preserve Satisfactory Results x
1.3.1. Lock Down Clocks, RAMs, and DSPs 1.3.2. Preserve Design Partition Results
1.3.2. Preserve Design Partition Results x
1.3.2.1. Design Partition Settings
1. AN 903: Accelerating Timing Closure in Intel® Quartus® Prime Pro Edition

1.3.1. Lock Down Clocks, RAMs, and DSPs

You can simplify timing closure by back-annotating satisfactory compilation results to lock down placement of large blocks related to Clocks, RAMs, and DSPs. Locking down large block placement can produce higher fMAX with less noise.

Locking down large blocks like RAMs and DSPs can be effective because these blocks have heavier connectivity than regular LABs, complicating movement during placement. When a seed produces good results from suitable RAM and DSP placement, you can capture that placement with back-annotation. Subsequent compiles can then benefit from the high quality RAM and DSP placement from the good seed. This technique does not significantly benefit designs with very few RAMs or DSPs.

Click Assignments > Back-Annotate Assignments to copy the device resource assignments from the last compilation to the .qsf for use in the next compilation. Select the back-annotation type in the Back-annotation type list.

Figure 18. Back-Annotate Assignments Dialog Box

Alternatively, you can run back-annotation with the following quartus_cdb executable. 

quartus_cdb <design_name> --back_annotate [--dsp] [--ram] [--clock]
Note: The executable supports the additional [--dsp], [--ram], and [--clock] variables that the Back-Annotate Assignments dialog box does not yet support.
Level Two Title