Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

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ID 683645
Date 11/06/2017
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Stratix® V Network Reference Platform Porting Guide 2. Developing Your Custom Platform 3. Stratix V Network Reference Platform Design Architecture A. Document Revision History
1. Intel® FPGA SDK for OpenCL™ Stratix® V Network Reference Platform Porting Guide x
1.1. Stratix V Network Reference Platform: Prerequisites 1.2. Features of the Stratix V Network Reference Platform 1.3. Contents of the Stratix V Network Reference Platform
1.1. Stratix V Network Reference Platform: Prerequisites x
1.1.1. Legacy Board Support
2. Developing Your Custom Platform x
2.1. Initializing Your Custom Platform 2.2. Removing Unused Hardware 2.3. Integrating Your Custom Platform with the Intel® FPGA SDK for OpenCL™ 2.4. Setting up the Software Development Environment 2.5. Building the Software in Your Custom Platform 2.6. Establishing Host Communication 2.7. Connecting the Memory 2.8. Integrating an OpenCL Kernel 2.9. Programming Your FPGA Quickly Using CvP 2.10. Guaranteeing Timing Closure 2.11. Troubleshooting
2.4. Setting up the Software Development Environment x
2.4.1. Setting Up Software Development Environment for Windows 2.4.2. Setting Up the Software Development Environment for Linux
3. Stratix V Network Reference Platform Design Architecture x
3.1. Host-FPGA Communication over PCIe 3.2. DDR3 as Global Memory for OpenCL Applications 3.3. QDRII as Heterogeneous Memory for OpenCL Applications 3.4. Host Connection to OpenCL Kernels 3.5. Implementation of UDP Cores as OpenCL Channels 3.6. FPGA System Design 3.7. Guaranteed Timing Closure 3.8. Addition of Timing Constraints 3.9. Connection to the Intel® FPGA SDK for OpenCL™ 3.10. FPGA Programming Flow 3.11. Host-to-Device MMD Software Implementation 3.12. OpenCL Utilities Implementation 3.13. Stratix V Network Reference Platform Implementation Considerations
3.1. Host-FPGA Communication over PCIe x
3.1.1. Parameter Settings for PCIe Instantiation 3.1.2. PCIe Device Identification Registers 3.1.3. Version ID 3.1.4. Definitions of Hardware Constants in Software Header Files 3.1.5. PCIe Kernel Driver 3.1.6. SG-DMA
3.2. DDR3 as Global Memory for OpenCL Applications x
3.2.1. DDR3 IP Instantiation 3.2.2. DDR3 Connection to PCIe Host 3.2.3. DDR3 Connection to OpenCL Kernel
3.5. Implementation of UDP Cores as OpenCL Channels x
3.5.1. QuickUDP IP Instantiation 3.5.2. QuickUDP Configuration via PCIe-Based Host 3.5.3. QuickUDP Connection to OpenCL Kernel
3.6. FPGA System Design x
3.6.1. Clocks 3.6.2. Resets 3.6.3. Floorplan 3.6.4. Global Routing 3.6.5. Pipelining 3.6.6. Encrypted IPs
3.7. Guaranteed Timing Closure x
3.7.1. Supply the Kernel Clock 3.7.2. Guarantee Kernel Clock Timing 3.7.3. Provide a Timing-Closed Post-Fit Netlist
3.9. Connection to the Intel® FPGA SDK for OpenCL™ x
3.9.1. Describe s5_net to the Intel® FPGA SDK for OpenCL™ 3.9.2. Describe the s5_net Hardware to the Intel® FPGA SDK for OpenCL™
3.10. FPGA Programming Flow x
3.10.1. CvP 3.10.2. Flash 3.10.3. Defining the Contents of the fpga.bin File
3.10.1. CvP x
3.10.1.1. Replacing FPGA Core Logic via CvP Programming 3.10.1.2. Specifying Configuration via PCI Express Options 3.10.1.3. Base versus CvP Update Revisions in CvP Programming
3.12. OpenCL Utilities Implementation x
3.12.1. aocl install 3.12.2. aocl uninstall 3.12.3. aocl program 3.12.4. aocl flash 3.12.5. aocl diagnose 3.12.6. aocl list-devices
1. Intel® FPGA SDK for OpenCL™ Stratix® V Network Reference Platform Porting Guide
2. Developing Your Custom Platform
3. Stratix V Network Reference Platform Design Architecture
A. Document Revision History

3.1.5. PCIe Kernel Driver

A PCIe® kernel driver is necessary for the OpenCL™ runtime library to access your board design via a PCIe bus.

The Stratix® V Network Reference Platform PCIe kernel driver is in the following directory:

  • For Windows systems, the driver is in the <path_to_s5_net>\windows64\driver folder
  • For Linux systems, the driver is in the <path_to_s5_net>/linux64/driver directory

Use the Intel® FPGA SDK for OpenCL™ install utility to install the kernel driver. Refer to aocl install for more information.

For Windows systems, the WinDriver API kernel driver is a third-party driver from Jungo Connectivity Ltd. For more information about the WinDriver, refer to the Jungo Connectivity Ltd. website or contact a Jungo Connectivity representative.

For Linux systems, an open-source, MMD-compatible kernel driver is available with s5_net.

Table 6.  Highlight of Files Available in the Linux Kernel Driver Directory
File Name Description
pcie_linux_driver_exports.h Header file defining the special commands that the kernel driver supports. It defines the interface of the kernel driver. The MMD layer uses this header file to communicate with the device.

After you install the kernel driver, it works as a character device. The basic operations to the driver are open(), close(), read(), and write(). To support more complex commands, an acl_cmd struct variable is necessary to pass the command of interest to the kernel driver through the read() or write() operation.

To execute a command, perform the following tasks:

  1. Create a variable as type acl_cmd_struct.
  2. Specify the command you want to execute with the appropriate parameters.
  3. Send the command through a read() or write() operation.
aclpci.c File that implements the basic structures and functions that a Linux kernel driver requires (for example, the init and remove functions, probe function, and functions that handle interrupts).
aclpci_fileio.c

File that implements the file I/O operations of the kernel driver. The s5_net Linux kernel driver supports four file I/O operations, namely open(), close(), read() and write(). Implementation of these file I/O operations allows the user application to access the kernel driver via file I/O system calls (open/read/write/close).

aclpci_cmd.c File that implements the special commands defined in the pcie_linux_driver_exports.h file. Examples of these special commands include SAVE_PCI_CONTROL_REGS, LOAD_PCI_CONTROL_REGS, DO_CVP, and GET_PCI_SLOT_INFO.
aclpci_dma.c File that implements DMA-related routine in the kernel driver.

Refer to SG-DMA for more information.

aclpci_cvp.c File that implements CvP-related routine in the kernel driver.

Refer to CvP for more information.

aclpci_queue.c File that implements a queue structure for use in the kernel driver. Such a queue structure eases programming.
Related Information
CvP
Level Two Title