Nios® V Processor Reference Manual

ID 683632
Date 12/11/2023
Public

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Document Table of Contents

3.3.1. General-Purpose Register File

Nios® V/m processor implementation supports a flat register file. The register file contains thirty-two 32-bit general-purpose integer registers. Nios® V/m processor implements the general-purpose register using M20K memories, which do not support two read ports. Hence, Nios® V/m processor duplicates the register files so that two different source registers for an instruction are available in a single cycle. After performing ALU operations, the processor core writes the same result to the destination register in both memories.