Low Latency Ethernet 10G MAC Intel® FPGA IP Release Notes

Download PDF
ID 683308
Date 4/01/2024
Public
Document Table of Contents
Document Table of Contents x
Low Latency Ethernet 10G MAC Intel® FPGA IP (intel_eth_em10g32) Release Notes Low Latency Ethernet 10G MAC Intel® FPGA IP (alt_em10g32) Release Notes
Low Latency Ethernet 10G MAC Intel® FPGA IP (intel_eth_em10g32) Release Notes x
Low Latency Ethernet 10G MAC Intel® FPGA IP (intel_eth_em10g32) v2.0.0
Low Latency Ethernet 10G MAC Intel® FPGA IP (alt_em10g32) Release Notes x
Low Latency Ethernet 10G MAC Intel® FPGA IP v22.0.4 Low Latency Ethernet 10G MAC Intel® FPGA IP v22.0.3 Low Latency Ethernet 10G MAC Intel® FPGA IP v22.0.1 Low Latency Ethernet 10G MAC Intel® FPGA IP v22.0.0 Low Latency Ethernet 10G MAC Intel® FPGA IP v20.1.0 Low Latency Ethernet 10G MAC Intel® FPGA IP v20.0.0 Low Latency Ethernet 10G MAC Intel® FPGA IP v19.3.1 Low Latency Ethernet 10G MAC Intel® FPGA IP v19.3.0 Low Latency Ethernet 10G MAC Intel® FPGA IP v19.2.0 Low Latency Ethernet 10G MAC Intel® FPGA IP v19.1 Low Latency Ethernet 10G MAC Intel® FPGA IP v18.1 Low Latency Ethernet 10G MAC Intel® FPGA IP v18.0 Intel FPGA Low Latency Ethernet 10G MAC IP Core v17.1 Update 1 Intel FPGA Low Latency Ethernet 10G MAC IP Core v17.1 Low Latency Ethernet 10G MAC IP Core v17.0 Low Latency Ethernet 10G MAC IP Core v16.1 Low Latency Ethernet 10G MAC IP Core v16.0 Low Latency Ethernet 10G MAC IP Core v15.1 Low Latency Ethernet 10G MAC IP Core v15.0 Low Latency Ethernet 10G MAC IP Core v14.1 Low Latency Ethernet 10G MAC IP Core v14.0 Arria 10 Edition Low Latency Ethernet 10G MAC IP Core v14.0 Low Latency Ethernet 10G MAC IP Core v13.1 Arria 10 Edition Low Latency Ethernet 10G MAC IP Core v13.1
Low Latency Ethernet 10G MAC Intel® FPGA IP (intel_eth_em10g32) Release Notes
Low Latency Ethernet 10G MAC Intel® FPGA IP (alt_em10g32) Release Notes

Low Latency Ethernet 10G MAC Intel® FPGA IP v19.3.1

Table 8.  v19.3.1 2021.12.13
Quartus® Prime Version Description Impact
21.4 Added support for the Agilex™ 7 F-tile device family.

Only 10M/100M/1G/2.5G/5G/10G (USXGMII) operating mode is supported.

 —
Design Example for Low Latency 10G Ethernet MAC Intel® FPGA IP:
  • Added the following design example for Agilex™ 7 F-tile devices:
    • 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet
 —
Level Two Title