External Memory Interfaces Intel® Agilex™ 7 F-Series and I-Series FPGA IP User Guide

ID 683216
Date 4/03/2023
Public

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Document Table of Contents

4.4.10. caltiming9

address=40(32 bit)

Field Bit High Bit Low Description Access
cfg_t_param_4_act_to_act 7 0 The four-activate window timing parameter. Read