Reed-Solomon II IP Core User Guide

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ID 683144
Date 11/17/2015
Public
Document Table of Contents
Document Table of Contents x
1. About the Reed-Solomon II IP Core 2. Reed-Solomon II IP Core Getting Started 3. Reed-Solomon II IP Core Functional Description 4. Document Revision History
1. About the Reed-Solomon II IP Core x
1.1. Altera DSP IP Core Features 1.2. Reed-Solomon II IP Core Features 1.3. DSP IP Core Device Family Support 1.4. DSP IP Core Verification 1.5. Reed-Solomon II IP Core Release Information 1.6. Reed-Solomon II IP Core Performance and Resource Utilization
2. Reed-Solomon II IP Core Getting Started x
2.1. Licensing IP Cores 2.2. IP Catalog and Parameter Editor 2.3. Generating IP Cores 2.4. Simulating Altera IP Cores in other EDA Tools 2.5. DSP Builder Design Flow
2.1. Licensing IP Cores x
2.1.1. OpenCore Plus IP Evaluation 2.1.2. Reed-Solomon II IP Core OpenCore Plus Timeout Behavior
2.3. Generating IP Cores x
2.3.1. Files Generated for Altera IP Cores and Qsys Systems
3. Reed-Solomon II IP Core Functional Description x
3.1. Architecture 3.2. Reed-Solomon II IP Core Parameters 3.3. Reed-Solomon II IP Core Interfaces and Signals
3.1. Architecture x
3.1.1. Reed-Solomon II Encoder 3.1.2. Reed-Solomon II Decoder 3.1.3. Multiple Input Channels
3.3. Reed-Solomon II IP Core Interfaces and Signals x
3.3.1. Avalon-ST Interfaces in DSP IP Cores 3.3.2. Reed-Solomon II IP Core Signals
1. About the Reed-Solomon II IP Core
2. Reed-Solomon II IP Core Getting Started
3. Reed-Solomon II IP Core Functional Description
4. Document Revision History

1.6. Reed-Solomon II IP Core Performance and Resource Utilization

Table 3.  Performance and Resource UtilizationTypical expected performance for a Reed-Solomon II IP Core using the Quartus Prime software with the Arria V (5AGXFB3H4F40C4), Cyclone V (5CGXFC7D6F31C6), and Stratix V (5SGSMD4H2F35C2) devices.
Device Parameters ALM Memory Registers fMAX (MHz)
Type Check Symbols Bits Per Symbol Bits Per Check Symbol M10K M20K Primary Secondary
Arria V Erasures decoder 16 8 204 1,687 1 -- 1,765 291 217
Arria V Erasures variable decoder 16 8 204 1,688 1 -- 1,810 269 213
Arria V Full error decoder 16 8 204 952 1 -- 989 170 239
Arria V Split error decoder 16 8 204 976 1 -- 999 144 224
Arria V Standard decoder large 32 8 255 1,628 1 -- 1,751 285 215
Arria V Standard decoder medium 16 8 204 944 1 -- 974 178 225
Arria V standard decoder small 6 4 15 201 1 -- 272 23 315
Arria V Standard encoder 16 8 204 87 0 -- 164 0 422
Arria V Variable decoder 16 8 204 964 1 -- 1,019 174 209
Arria V Variable encoder large 32 8 204 904 0 -- 299 0 234
Arria V Variable encoder small 16 8 204 444 0 -- 169 0 259
Cyclone V Erasures decoder 16 8 204 1,670 1 -- 1,769 366 192
Cyclone V Erasures variable decoder 16 8 204 1,683 1 -- 1,812 342 196
Cyclone V Full error decoder 16 8 204 953 1 -- 989 232 215
Cyclone V Split error decoder 16 8 204 968 1 -- 1,003 198 209
Cyclone V Standard decoder large 32 8 255 1,631 1 -- 1,752 409 193
Cyclone V Standard decoder medium 16 8 204 938 1 -- 972 227 222
Cyclone V standard decoder small 6 4 15 200 1 -- 272 56 275
Cyclone V Standard encoder 16 8 204 87 0 -- 164 0 372
Cyclone V Variable decoder 16 8 204 968 1 -- 1,016 241 220
Cyclone V Variable encoder large 32 8 204 905 0 -- 299 0 188
Cyclone V Variable encoder small 16 8 204 444 0 -- 169 0 217
Stratix V Erasures decoder 16 8 204 1,648 -- 1 1,765 423 367
Stratix V Erasures variable decoder 16 8 204 1,664 -- 1 1,802 405 368
Stratix V Full error decoder 16 8 204 955 -- 1 987 252 424
Stratix V Split error decoder 16 8 204 969 -- 1 1,003 248 424
Stratix V Standard decoder large 32 8 255 1,624 -- 1 1,749 432 404
Stratix V Standard decoder medium 16 8 204 939 -- 1 972 281 410
Stratix V standard decoder small 6 4 15 197 -- 1 272 52 525
Stratix V Standard encoder 16 8 204 87 -- 0 164 0 610
Stratix V Variable decoder 16 8 204 966 -- 1 1,017 270 409
Stratix V Variable encoder large 32 8 204 902 -- 0 299 0 397
Stratix V Variable encoder small 16 8 204 435 -- 0 169 0 434
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