Reed-Solomon II IP Core User Guide

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ID 683144
Date 11/17/2015
Public
Document Table of Contents
Document Table of Contents x
1. About the Reed-Solomon II IP Core 2. Reed-Solomon II IP Core Getting Started 3. Reed-Solomon II IP Core Functional Description 4. Document Revision History
1. About the Reed-Solomon II IP Core x
1.1. Altera DSP IP Core Features 1.2. Reed-Solomon II IP Core Features 1.3. DSP IP Core Device Family Support 1.4. DSP IP Core Verification 1.5. Reed-Solomon II IP Core Release Information 1.6. Reed-Solomon II IP Core Performance and Resource Utilization
2. Reed-Solomon II IP Core Getting Started x
2.1. Licensing IP Cores 2.2. IP Catalog and Parameter Editor 2.3. Generating IP Cores 2.4. Simulating Altera IP Cores in other EDA Tools 2.5. DSP Builder Design Flow
2.1. Licensing IP Cores x
2.1.1. OpenCore Plus IP Evaluation 2.1.2. Reed-Solomon II IP Core OpenCore Plus Timeout Behavior
2.3. Generating IP Cores x
2.3.1. Files Generated for Altera IP Cores and Qsys Systems
3. Reed-Solomon II IP Core Functional Description x
3.1. Architecture 3.2. Reed-Solomon II IP Core Parameters 3.3. Reed-Solomon II IP Core Interfaces and Signals
3.1. Architecture x
3.1.1. Reed-Solomon II Encoder 3.1.2. Reed-Solomon II Decoder 3.1.3. Multiple Input Channels
3.3. Reed-Solomon II IP Core Interfaces and Signals x
3.3.1. Avalon-ST Interfaces in DSP IP Cores 3.3.2. Reed-Solomon II IP Core Signals
1. About the Reed-Solomon II IP Core
2. Reed-Solomon II IP Core Getting Started
3. Reed-Solomon II IP Core Functional Description
4. Document Revision History

3.2. Reed-Solomon II IP Core Parameters

Table 6.  Parameters
Parameter Legal Values Default Value Description
Reed-Solomon Encoder or Decoder Encoder Specifies an encoder or a decoder.
Number of channels 1 to 16 1 Specifies the number of input channels (C) to process. The channel pattern is fixed.
Number of bits per symbol 3 to 12 8 Specifies the number of bits per symbol (M).
Number of symbols per codeword 1 to 2M–1 255 Specifies the total number of symbols per codeword (N). The decoder accept a new symbol every clock cycle if 6.5R < N. If N>=6.5R+1, the decoder shows continuous behavior.
Number of check symbols per codeword 1 to N–1 16 Specifies the number of check symbols per codeword (R).
Field Polynomial Any valid polynomial 285 Specifies the primitive polynomial defining the Galois field. The parameter editor allows you to select only legal values. If you cannot find your intended field polynomial, contact Altera MySupport.
Type of generator polynomial Classical or CCSDS-like Classical Specifies the representation of the generator polynomial.
First root of the polynomial generator 1 to 2M–2 0 Specifies the first root of the generator polynomial.
Root spacing in the polynomial generator Any primitive elements in the field 1 Specifies spacing between roots in the generator polynomial.
Erasures-supporting decoder On or off Off Specifies the erasures-supporting decoder. This option substantially increases the logic resources the design uses.
Variable codeword length On or off Off Specifies variable codeword length with numn signal. When off, the latency equation is: L= N + 6.5R+8
Control signal sop or eop or in_numn in_numn signal Specifies how to pass the codeword length to the IP core
Optimization type Latency or resource Latency Select resource, so the latency always corresponds to that of the largest possible codeword. Select latency, so the latency corresponds to the current codeword.
Variable number of check symbols On or off Off Specifies check symbols with numcheck signal.
Error symbol value On or off On Specifies whether the decoder indicates the error symbols.
Error symbol count On or off On Specifies whether the decoder indicates the number of error symbols per codeword.
Error bit count On or off On Specifies whether the decoder indicates the number of error bits per codeword.
Error bits count format Full or split Full Specifies full or split count:
  • With full count the decoder just counts the number of received error bit
  • With split count the decoder counts the number of received error bits with initial value "1" (then corrects to value "0") and outputs num_error_bit1 . It also counts the number of received error bits with initial value "0" (then corrects to the value "1") and outputs num_error_bit0
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