PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes

ID 683090
Date 4/01/2024
Public
Document Table of Contents

PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v21.0.0

Table 8.  v21.0.0 2021.04.23
Quartus® Prime Version Description Impact
21.1
  • Added support for single-ended strobe configuration.
  • Added support for calibrated VREF via dynamic reconfiguration.
  • Added guidelines for I/O timing.
  • Added information for input strobe phase delay usable limits.
  • Updated guidelines for dynamic reconfiguration.