PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes

Download PDF
ID 683090
Date 4/01/2024
Public
Document Table of Contents
Document Table of Contents x
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes x
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) Release Notes ( Agilex™ 7 M-Series Devices) PHY Lite for Parallel Interfaces Intel® FPGA IP (altera_phylite_s20) Release Notes ( Agilex™ 7 F-Series and I-Series Devices) PHY Lite for Parallel Interfaces Intel FPGA IP Core v19.3.0 PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.1 PHY Lite for Parallel Interfaces Intel FPGA IP Core v18.0 Intel FPGA PHYLite for Parallel Interfaces IP Core v17.1 Altera PHYLite for Parallel Interfaces IP Core v16.0 Altera PHYLite for Parallel Interfaces IP Core v15.1 Altera PHYLite for Memory IP Core v14.1 Altera PHYLite for Memory IP Core v14.0 Arria 10 Edition PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide Document Archives
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) Release Notes ( Agilex™ 7 M-Series Devices) x
PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v5.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.1.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v4.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v3.0.0 PHY Lite for Parallel Interfaces Intel® FPGA IP (phylite_ph2) v2.0.0
PHY Lite for Parallel Interfaces Intel® FPGA IP (altera_phylite_s20) Release Notes ( Agilex™ 7 F-Series and I-Series Devices) x
PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.3.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.1.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v21.0.0 PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v20.3.0
PHY Lite for Parallel Interfaces Intel® FPGA IP Cores Release Notes

PHY Lite for Parallel Interfaces Intel Agilex FPGA IP (altera_phylite_s20) v22.1.0

Table 7.  v22.1.0 2022.06.21
Quartus® Prime Version Description Impact
22.2 Removed the channel_strobe_out_in port from phylite_tester entity which resolved the compilation error in the Questa* Intel® FPGA Edition software version 2022.1 while running a simulation of the VHDL-based design example of the PHY Lite for Parallel Interfaces Intel Agilex FPGA IP. Use the latest version of the Quartus® Prime Pro Edition software.
Level Two Title