Visible to Intel only — GUID: sgy1646335358344
Ixiasoft
Visible to Intel only — GUID: sgy1646335358344
Ixiasoft
2.10.5. PTP Status Interface
A separate PTP status interface is available for each supported port within a reconfiguration group. The below table shows the interface details for different number of ports.
Maximum Number of Ports | Applicable Reconfiguration Groups | Signal Name |
---|---|---|
1 | 25GE-1 Reconfigurable 50GE-1 Reconfigurable |
Port 0: o_p0_tx_ptp_offset_data_valid o_p0_rx_ptp_offset_data_valid o_p0_tx_ptp_ready o_p0_rx_ptp_ready |
2 | 100GE-2 Reconfigurable |
Port 0: o_p0_tx_ptp_offset_data_valid o_p0_rx_ptp_offset_data_valid o_p0_tx_ptp_ready o_p0_rx_ptp_ready Port 1: o_p1_tx_ptp_offset_data_valid o_p1_rx_ptp_offset_data_valid o_p1_tx_ptp_ready o_p1_rx_ptp_ready |
4 | 100GE-4 Reconfigurable 400GE-8 Reconfigurable 200GE-4 Reconfigurable |
Port 0: o_p0_tx_ptp_offset_data_valid o_p0_rx_ptp_offset_data_valid o_p0_tx_ptp_ready o_p0_rx_ptp_ready Port 1: o_p1_tx_ptp_offset_data_valid o_p1_rx_ptp_offset_data_valid o_p1_tx_ptp_ready o_p1_rx_ptp_ready Port 2: o_p2_tx_ptp_offset_data_valid o_p2_rx_ptp_offset_data_valid o_p2_tx_ptp_ready o_p2_rx_ptp_ready Port 3: o_p3_tx_ptp_offset_data_valid o_p3_rx_ptp_offset_data_valid o_p3_tx_ptp_ready o_p3_rx_ptp_ready |