Intel® Stratix® 10 SEU Mitigation User Guide

ID 683602
Date 12/30/2022
Public

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2.3.1.2. On-Chip Lookup Sensitivity Processing

The Advanced SEU Detection IP core reads the error message queue content and then compares single-bit error locations with a sensitivity map. This check determines whether or not the failure affects the device operation.

Figure 2. System Overview for On-Chip Lookup Sensitivity Processing with Advanced SEU Detection IP Core

The on-chip lookup sensitivity processing is as follows:

  1. The SEU_ERROR is asserted when there is an SEU error.
  2. The Advanced SEU Detection IP core retrieves the SEU error message from SDM.
    Note: The Advanced SEU Detection IP core asserts sys_error signal if error occurs in system while retrieving the SEU error message.
  3. The Advanced SEU Detection IP core starts performing sensitivity processing. During this process:
    • The Advanced SEU Detection IP core asserts the busy signal.
    • The Advanced SEU Detection IP core reads the .smh file. You must provide the information for the memory access logic and external memory.
  4. The Advanced SEU Detection IP core deasserts the busy signal to indicate completion of sensitivity processing and reports the criticality of the SEU error through the following signals:
    • critical_error
    • noncritical_error
    • regions_report
    • seu_data (optional)