Video and Image Processing Suite User Guide

ID 683416
Date 4/04/2022
Public
Document Table of Contents

1.2. Device Family Support

Table 3.   Device Family SupportThe table lists the device support information for the Video and Image Processing Suite IP cores. The Warp Lite IP only supports Intel® Arria® 10 and Intel® Stratix® 10 devices.

Device Family

Support

Intel® Stratix® 10 Final
Intel® Agilex™ Final 2
Intel® Arria® 10 Final
Intel® Cyclone® 10 LP Final
Intel® Cyclone® 10 GX Final
Intel® MAX® 10 Final
Arria® II GX/GZ Final
Arria® V GX/GT/SX/ST Final
Arria® V GZ Final
Cyclone® IV E/GX Final
Cyclone® V Final
Stratix® IV Final
Stratix® V Final
Other device families No support

The following terms define device support levels for Intel FPGA IP cores:

  • Advance support—the IP core is available for simulation and compilation for this device family. Timing models include initial engineering estimates of delays based on early post-layout information. The timing models are subject to change as silicon testing improves the correlation between the actual silicon and the timing models. You can use this IP core for system architecture and resource utilization studies, simulation, pinout, system latency assessments, basic timing assessments (pipeline budgeting), and I/O transfer strategy (data-path width, burst depth, I/O standards tradeoffs).
  • Preliminary support—the IP core is verified with preliminary timing models for this device family. The IP core meets all functional requirements, but might still be undergoing timing analysis for the device family. It can be used in production designs with caution.
  • Final support—the IP core is verified with final timing models for this device family. The IP core meets all functional and timing requirements for the device family and can be used in production designs.
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The following IPs don’t support Intel Agilex devices: Deinterlacer II , Frame Buffer II, Clocked Video Interface.