Intel® FPGA Streaming Video Protocol Specification

ID 683397
Date 5/15/2024
Public
Document Table of Contents

4.1. Full-Raster Frame Structure

Generally, video timing parameters are based on two concepts: blank timing, and sync timing. Each connectivity protocol uses one of these methods to define a full-raster video frame, e.g., SDI uses blank timing and HDMI uses sync timing.

For sync-timing systems you can have:

  • Hsync – horizontal synchronization pulse
  • Vsync – vertical synchronization pulse

For blank-timing systems you can have:

  • Hblank – horizontal blanking interval
  • Vblank – vertical blanking interval

Several video technical organizations, such as the Video Electronics Standard Association (VESA), and the Consumer Electronics Association (CEA), define full-raster video timing parameters. For example, the selected video standard (e.g., SMPTE 424, CEA-861-D and VESA) or custom timing parameters programmed in the host interface define the width and timing of the Hsync, Hblank, Vsync and Vblank signals. The full-raster protocol adheres to the industry norm.

Usually, the active video data is geometrically in between the horizontal and vertical blanking areas. Both vertical and horizontal blanking areas are in four distinctive groups:

  • Front porch
  • Sync pulse
  • Back porch
  • Active video

The figures superimpose full-raster streams on top of a video frame raster, The figures show where the IP injects full raster timing information (FRn), ancillary (An) data (Pn) and active video data into the payload of the TDATA bus.

Figure 45. Timing for a Progressive Video ImageThe figure shows an example of a progressive video. The vertical dashed red line indicates the end of the video line. TLAST is asserted here.
Figure 46. Timing for an Interlaced ImageThe figure shows an example of a interlaced video. The vertical dashed red line indicates the end of the video line. TLAST is asserted here.