Interlaken (2nd Generation) Intel® FPGA IP Release Notes

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ID 683052
Date 12/04/2023
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1. Interlaken (2nd Generation) Intel® FPGA IP FPGA IP Release Notes
1. Interlaken (2nd Generation) Intel® FPGA IP FPGA IP Release Notes x
1.1. Interlaken (2nd Generation) Intel® FPGA IP v21.1.3 1.2. Interlaken (2nd Generation) Intel® FPGA IP v20.0.0 1.3. Interlaken (2nd Generation) Intel® FPGA IP v19.3.0 1.4. Interlaken (2nd Generation) Intel® FPGA IP v19.2.1 1.5. Interlaken (2nd Generation) Intel® Stratix® 10 FPGA IP v18.1 Update 1 1.6. Interlaken (2nd Generation) Intel® Stratix® 10 FPGA IP v18.1 1.7. Interlaken (2nd Generation) Intel® FPGA IP v18.0.1 1.8. Interlaken (2nd Generation) Intel® FPGA IP v18.0 1.9. Interlaken IP Core (2nd Generation) v17.1 1.10. Interlaken (2nd Generation) Intel® FPGA IP User Guide Archives
1. Interlaken (2nd Generation) Intel® FPGA IP FPGA IP Release Notes

1.8. Interlaken (2nd Generation) Intel® FPGA IP v18.0

Table 8.  Version 18.0 May 2018
Description Impact Notes
Renamed the Interlaken IP core (2nd Generation) to Interlaken (2nd Generation) Intel® FPGA IP as per Intel rebranding. — —
Added 25.8 Gbps data rate support for number of lanes 6 and 12. — —
Added support for Cadence Xcelium* Parallel simulator. — —
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