HDMI Intel® FPGA IP User Guide

ID 683798
Date 12/04/2023
Public
Document Table of Contents

9.2.2.19. VIDEO_MODE_FIELD_RISING (0x63)

Table 119.  VIDEO_MODE_FIELD_RISING (0x63)
Name Bit(s) Access Description Reset
Reserved 31:16
Field rising 15:0 RW Specifies the line number given to the end of field 0 and the start of field 1. 0x0