AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

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ID 683757
Date 8/16/2018
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Document Table of Contents
Document Table of Contents x
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile x
Setup Requirements Debug Flow with Signal Probe and Rapid Recompile Example of Using Signal Probe Routing Feature Document Revision History for AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile
Debug Flow with Signal Probe and Rapid Recompile x
Reserve Signal Probe Pins Compile the Design Assign Nodes to Signal Probe Pins Recompile the Design Tcl Command to Recompile the Design Check Connection Table in Fitter Report
Example of Using Signal Probe Routing Feature x
Example Files
AN 799: Quick Intel® Arria® 10 Design Debugging Using Signal Probe and Rapid Recompile

Recompile the Design

After assigning nodes to the Signal Probe pins, run Rapid Recompile. Rapid Recompile preserves timing and reduces compilation time by reusing previous results whenever possible.

You can run Rapid Recompile from the Intel® Quartus® Prime software, a command line executable, or a Tcl script.

Tcl Command to Recompile the Design

# Run the fitter with --recompile to preserve timing
# and quickly connect the Signal Probe pins
execute_module -tool fit -args {--recompile}

After recompilation, you are ready to program the device and debug the design.

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