Ethernet Design Example Components Release Notes

ID 683598
Date 4/01/2024
Public
Document Table of Contents

1.1.2. Ethernet IEEE 1588 Time of Day Clock Intel® FPGA IP v20.0.0

Table 2.  v20.0.0 2022.09.26
Quartus® Prime Version Description Impact
22.3 In Platform Designer, the interface type of the following signals are changed from Conduit to Avalon® Streaming.
  • time_of_day_96b
  • time_of_day_96b_load
  • time_of_day_64b
  • time_of_day_64b_load
In Platform Designer, the interface type of these signals are not compatible with the older IP version.