R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683501
Date 6/20/2022
Public

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Document Table of Contents

5.2.3.14. Vendor Specific Extended Capability (VSEC) Registers

Table 100.  VSEC Register
Parameter Value Default Value Description
Vendor Specific Extended Capability 0/1 0 Enables the Vendor Specific Extended Capability (VSEC).
User ID register from the Vendor Specific Extended Capability 0 - 65534 0 Sets the read-only value of the 16-bit User ID register from the Vendor Specific Extended Capability.
Drops Vendor Type0 Messages 0/1 0

When this parameter is set to 1, the IP core drops vendor Type 0 messages while treating them as Unsupported Requests (UR).

When it is set to 0, the IP core passes these messages on to the user logic.

This option is not applicable to TLP Bypass mode. In TLP Bypass mode, the received Vendor Message Type 0 will always be visible on the RX AVST interface.

Drops Vendor Type1 Messages 0/1 0

When this parameter is set to 1, the IP core silently drops vendor Type 1 messages.

When it is set to 0, the IP core passes these messages on to the user logic.

This option is not applicable to TLP Bypass mode. In TLP Bypass mode, the received Vendor Message Type 1 will always be visible on the RX AVST interface.