Intel® FPGA SDK for OpenCL™ Standard Edition: Custom Platform Toolkit User Guide

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ID 683398
Date 9/24/2018
Public
Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide 2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide x
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit 1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.3. Custom Platform Automigration for Forward Compatibility 1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.5. Applying for the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Status 1.6. Shipping Recommendations 1.7. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Design Revision History
1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.2.1. Directories and Files in an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.2.2. Recommendations for Structuring the Custom Platform Directory
1.3. Custom Platform Automigration for Forward Compatibility x
1.3.1. Customizing Automigration
1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.4.1. Designing the Board Hardware 1.4.2. Creating the Board XML Files 1.4.3. Creating the MMD Library 1.4.4. Setting Up the FPGA Client Driver 1.4.5. Providing Intel® FPGA SDK for OpenCL™ Standard Edition Utilities Support 1.4.6. Testing the Hardware Design
1.4.1. Designing the Board Hardware x
1.4.1.1. Creating the Board Platform Designer (Standard) System 1.4.1.2. Establishing Guaranteed Timing Flow
1.4.1.1. Creating the Board Platform Designer (Standard) System x
1.4.1.1.1. General Quality of Results Considerations for the Exported Board Partition
1.4.2. Creating the Board XML Files x
1.4.2.1. Creating the board_env.xml File 1.4.2.2. Creating the board_spec.xml File
1.4.2.1. Creating the board_env.xml File x
1.4.2.1.1. Testing the board_env.xml File
1.4.3. Creating the MMD Library x
1.4.3.1. Kernel Power-up State
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material x
2.1. The Board Platform Designer (Standard) Subsystem 2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File 2.3. MMD API Descriptions 2.4. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Manual Revision History
2.1. The Board Platform Designer (Standard) Subsystem x
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components x
2.1.1.1. OpenCL Kernel Clock Generator 2.1.1.2. OpenCL Kernel Interface 2.1.1.3. OpenCL Memory Bank Divider
2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File x
2.2.1. board 2.2.2. device 2.2.3. global_mem 2.2.4. host 2.2.5. channels 2.2.6. interfaces 2.2.7. interface 2.2.8. compile
2.3. MMD API Descriptions x
2.3.1. aocl_mmd_get_offline_info 2.3.2. aocl_mmd_get_info 2.3.3. aocl_mmd_open 2.3.4. aocl_mmd_close 2.3.5. aocl_mmd_read 2.3.6. aocl_mmd_write 2.3.7. aocl_mmd_copy 2.3.8. aocl_mmd_set_interrupt_handler 2.3.9. aocl_mmd_set_status_handler 2.3.10. aocl_mmd_yield 2.3.11. aocl_mmd_shared_mem_alloc 2.3.12. aocl_mmd_shared_mem_free 2.3.13. aocl_mmd_reprogram 2.3.14. aocl_mmd_hostchannel_create 2.3.15. aocl_mmd_hostchannel_destroy 2.3.16. aocl_mmd_hostchannel_get_buffer 2.3.17. aocl_mmd_hostchannel_ack_buffer
2.3.13. aocl_mmd_reprogram x
2.3.13.1. Reprogram Support
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material

2.3.13.1. Reprogram Support

For Intel® FPGA SDK for OpenCL™ Standard Edition users who program their FPGAs with the clCreateProgramWithBinary flow (that is, reprogram-on-the-fly), the aocl_mmd_reprogram subroutine is used to configure the FPGA from within the host applications. The host ensures that this call executes only when the FPGA is idle, meaning that no kernels are running and no transfers are outstanding. The MMD layer must then reconfigure the device with the data in the user_data argument of aocl_mmd_reprogram.

The data in the user_data argument is the same fpga.bin data created during Intel® Quartus® Prime compilation. The Intel® FPGA SDK for OpenCL™ Offline Compiler packages the exact contents of fpga.bin into the .aocx file during compilation. The contents of the fpga.bin is irrelevant to the offline compiler. It simply passes the file contents through the host and to the aocl_mmd_reprogram call via the user_data argument.

For more information on the clCreateProgramWithBinary function, refer to the OpenCL Specification version 1.0 and the Programming an FPGA via the Host section of the Intel® FPGA SDK for OpenCL™ Standard Edition Programming Guide.

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