External Memory Interfaces Arria® 10 FPGA IP Core Release Notes

Download PDF
ID 683274
Date 4/01/2024
Public
Document Table of Contents
Document Table of Contents x
1. External Memory Interfaces Arria® 10 FPGA IP Core Release Notes
1. External Memory Interfaces Arria® 10 FPGA IP Core Release Notes x
1.1. External Memory Interfaces Arria® 10 FPGA IP Core v19.2.3 1.2. External Memory Interfaces Arria® 10 FPGA IP Core v19.1.0 1.3. External Memory Interfaces Arria® 10 FPGA IP 19.1 1.4. External Memory Interfaces Arria® 10 FPGA IP 18.1 1.5. External Memory Interfaces Arria® 10 FPGA IP 18.0 1.6. Arria® 10 External Memory Interface IP 17.1 1.7. Arria 10 External Memory Interface IP 17.0 1.8. Arria 10 External Memory Interface IP 16.1
1. External Memory Interfaces Arria® 10 FPGA IP Core Release Notes

1.4. External Memory Interfaces Arria® 10 FPGA IP 18.1

Table 4.  v18.1 September 2018
Description Impact
Verified in the Quartus® Prime software v18.1. Provides external memory interface IP for DDR3, DDR4, QDR II/II+/Xtreme, QDR-IV, RLDRAM3, and LPDDR3 protocols for Arria® 10 devices.
Related Information
Level Two Title