AN 556: Using the Design Security Features in Intel FPGAs

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ID 683269
Date 5/21/2021
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Document Table of Contents
Document Table of Contents x
Using the Design Security Features in Intel® FPGAs
Using the Design Security Features in Intel® FPGAs x
Overview of the Design Security Feature Hardware and Software Requirements Steps for Implementing a Secure Configuration Flow Steps to Enable Tamper-Protection Bit Programming Supported Configuration Schemes Security Mode Verification Serial Flash Loader Support with Encryption Enabled Serial Flash Loader Support with Encryption Enabled for Single FPGA Device Chain JTAG Secure Mode for 28-nm and 20-nm FPGAs Document Revision History for AN 556: Using the Design Security Features in Intel® FPGAs
Overview of the Design Security Feature x
Security Encryption Algorithm Non-Volatile and Volatile Key Storage Key Programming Intel® Arria® 10 and Intel® Cyclone® 10 GX Qcrypt Security Tool
Intel® Arria® 10 and Intel® Cyclone® 10 GX Qcrypt Security Tool x
Using Qcrypt Tool Qcrypt Tool Options Security Levels of Qcrypt Tool Security Option
Hardware and Software Requirements x
Hardware Requirements Software Requirements
Steps for Implementing a Secure Configuration Flow x
Step 1: Generating .ekp File and Encrypting Configuration File Step 2a: Programming Volatile Key into the FPGAs Step 2b: Programming Non-Volatile Key into the FPGAs Step 3: Configuring the 40-nm, 28-nm, or 20-nm FPGAs with Encrypted Configuration Data
Step 1: Generating .ekp File and Encrypting Configuration File x
Generating Single-Device .ekp File and Encrypting Configuration File using Intel® Quartus® Prime Software Generating Single-Device .ekp File and Encrypting Configuration File using Command-Line Interface in Intel® Quartus® Prime Software Generating Multi-Device .ekp File and Encrypting Configuration File using Intel® Quartus® Prime Software
Step 2b: Programming Non-Volatile Key into the FPGAs x
Programming Volatile or Non-Volatile Key using Intel® FPGA Ethernet Cable and Intel® Quartus® Prime Software Programming Single-Device Volatile or Non-Volatile Key using Intel® Quartus® Prime Software Programming Single-Device Volatile or Non-Volatile Key using the Command-Line Interface in Intel® Quartus® Prime Software Programming Multi-Device Volatile or Non-Volatile Key using Intel® Quartus® Prime Software Programming Multi-Device Volatile or Non-Volatile Key using the Command-Line Interface in Intel® Quartus® Prime Software Programming Key using JTAG Technologies
Security Mode Verification x
Verification During JTAG Secure Mode
JTAG Secure Mode for 28-nm and 20-nm FPGAs x
Internal JTAG Interface Design Example for JTAG Secure Mode
Design Example for JTAG Secure Mode x
Design Example Intel® Quartus® Prime Design Components LOCK and UNLOCK JTAG Instructions Verifying JTAG Secure Mode
Using the Design Security Features in Intel® FPGAs

Key Programming

Table 6.  Key Programming Methods
Programming Procedure Method Programming Tool/Support
On-Board Programming Prototyping Intel® FPGA Ethernet Cable 6, JTAG Technologies 7, Intel® FPGA Parallel Port Cable 8, Intel® FPGA Download Cable 9, and Intel® FPGA Download Cable II 10.
Production JTAG Technologies*
Off-Board Programming Prototyping System General*
Production System General*

Key programming uses the following definitions:

  • On-board: procedure in which the device is programmed on your board
  • Off-board: procedure in which the device is programmed on a separate programming system
  • Prototyping: method initially used to verify proper operation of a particular method
  • Production: method used for large-volume production
Note: For other third-party non-volatile key programming, you must regulate the JTAG TCK pulse width (period) for proper polyfuse programming, as listed in Table 10.
Related Information
6 Intel® FPGA Ethernet Cable supports both volatile and non-volatile key programming.
7 JTAG Technologies* supports both volatile and non-volatile key programming.
8 Intel® FPGA Parallel Port Cable supports only volatile key programming.
9 Intel® FPGA Download Cable support only volatile key programming except in 20-nm FPGAs, where it supports both volatile and non-volatile key programming.
10 Intel® FPGA Download Cable II supports both volatile and non-volatile key programming.
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