Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 1/27/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.5.2.1.4. Validating Timing Constraints with Snapshot Viewer

  1. To run the Plan or Place stage of the Fitter, double-click the stage in the Compilation Dashboard.
  2. After the stage completes, click the Snapshot Viewer icon for that stage in the Compilation Dashboard. The Snapshot Viewer opens.
  3. Under Validate Constraints, double-click Timing Exceptions. The Timing Exception Results report opens, allowing additional analysis and locating to other tools.
    Figure 26. Validate Constraints—Timing Exceptions Report
  4. Under Validate Constraints, double-click Check Unregistered Ports.
    Figure 27. Validate Constraints—Check Unregistered Ports Report