Intel® Quartus® Prime Pro Edition User Guide: Third-party Synthesis

ID 683122
Date 12/12/2023
Public
Document Table of Contents

1.2.1. Timing Optimization

If your area or timing requirements are not met, you can change the constraints and resynthesize the design in the Precision RTL software, or you can change the constraints to optimize the design during place-and-route in the Intel® Quartus® Prime software. Repeat the process until the area and timing requirements are met.

You can use other options and techniques in the Intel® Quartus® Prime software to meet area and timing requirements. For example, the WYSIWYG Primitive Resynthesis option can perform optimizations on your EDIF netlist in the Intel® Quartus® Prime software.

While simulation and analysis can be performed at various points in the design process, final timing analysis should be performed after placement and routing is complete.