External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 12/19/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.30. ecc4: Status and Error Information

address=144(32 bit)

Field Bit High Bit Low Description Access
sts_ecc_intr 0 0 Indicates the interrupt status; a value of 1 indicates an interrupt occurred. Read
sts_sbe_error 1 1 Indicates the SBE status; a value of 1 indicates SBE occurred. Read
sts_dbe_error 2 2 Indicates the DBE status; a value of 1 indicates DBE occurred. Read
sts_corr_dropped 3 3 Indicates the status of correction command dropped; a value of 1 indicates correction command dropped. Read
sts_sbe_count 7 4 Indicates the number of times SBE error has occurred. The counter can overflow. Read
sts_dbe_count 11 8 Indicates the number of times DBE error has occurred. The counter can overflow. Read
sts_corr_dropped_count 15 12 Indicates the number of times correction command has dropped. The counter can overflow. Read
Reserved 31 16   Read