This document provides information about errata affecting the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs.
The table below can be used as a reference to identify the FPGA Interface Manager (FIM), Open Programmable Acceleration Engine (OPAE) and Intel® Quartus® Prime Pro Edition version that corresponds to your software stack release.
Table 1. Intel® Acceleration Stack 1.1 Reference Table
| Intel® Acceleration Stack Version |
Platform |
FPGA Interface Manager (FIM) Version: Partial Reconfiguration (PR) Interface ID |
Open Programmable Acceleration Engine (OPAE) Version |
Intel® Quartus® Prime Pro Edition |
| 1.1 Production 1 |
Intel® PAC with Intel® Arria® 10 GX FPGA |
9926ab6d-6c92-5a68-aabc-a7d84c545738 |
1.0.2 |
17.1.1 |
| 1.1 Beta |
Intel® PAC with Intel® Arria® 10 GX FPGA |
0f17997f-199b-5f75-9713-2653d3ce0176 |
1.0.1 |
17.1.1 |
| 1.1 Alpha |
Intel® PAC with Intel® Arria® 10 GX FPGA |
8fd6574f-8f82-5164-9336-69c4bdaba437 |
0.14.0 |
17.1.1 |
| 1.0 Production1 |
Intel® PAC with Intel® Arria® 10 GX FPGA |
ce489693-98f0-5f33-946d-560708be108a |
0.13.1 |
17.0.0 |
1 When the image in the user partition cannot be loaded, a flash failover occurs and the factory image is loaded instead. After a flash failover occurs, the PR ID reads as d4a76277-07da-528d-b623-8b9301feaffe.