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1. Quick Start Guide
2. 10M/100M/1G Ethernet Design Example
3. 1G/2.5G Ethernet Design Example with IEEE 1588v2 Feature
4. 2.5G Ethernet Design Example
5. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example
6. Interface Signals Description
7. Configuration Registers Description
8. Document Revision History for the Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide: Agilex™ 5
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1.4. Compiling the Design Example
To change the target device in your hardware design example, follow these steps:
- Ensure hardware design example generation is complete.
- In the Quartus® Prime Pro Edition software, open the Quartus® Prime project <design_example_dir>/altera_eth_top.qpf.
- On the Processing menu, click Start Compilation.