Memory Protection Unit (MPU)

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This design example shows the basic features of the Nios® II processor optional memory protection unit (MPU), including how to use the MPU without the support of an operating system (OS).

Hardware Design Specifications

The hardware design used in this example targets the Nios II Embedded Evaluation Kit (NEEK), Cyclone® III Edition. Key peripherals in this design include:

Nios II/f CPU core with the MPU enabled
On-chip RAM
JTAG UART

Using This Design Example

For information on how to run the design example, please refer to Nios II MPU Usage.
Download the files used in this example: an540_91.zip.