Critical Issue
The defect prevents these LEs from driving out to the left side of the logic array block (LAB). When these LEs drive an output pin or another LE in the same LAB using local line 10, you may see functional failures and/or outputs stuck at ground. These LEs will operate normally in all other aspects, including proper implementation of logic in their look-up tables (LUTs).
Because this issue only affects one aspect of these four particular LEs, most designs will not be affected by this problem. Even so, Altera has created the following utility to determine whether your design uses these LEs and is affected by this problem.
Please note that this problem was isolated to the EP20K400E device and Altera has ensured that no other devices have similar flaws. Altera has also implemented a new test program to screen all products for this type of defect.
Altera is also evaluating options to correct this flaw on future APEX EP20K400E shipments.
Click on the following link for the EP20K400E errata sheet.
EP20K400E Programmable Logic Device Errata Sheet
The Excalibur™ EPXA4 devices are not affected by this problem.