Article ID: 000077755 Content Type: Troubleshooting Last Reviewed: 09/12/2012

Why are my source_sop and source_eop being optimized out of my multichannel FIR Compiler II implementation?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description Due to a bug in the Quartus® II FIR Compiler II Megafunction, multichannel implementations may result in the source_sop and source_eop being optimized away, which may cause problems in your design or in gate-level simulation.
    Resolution

    To workaround this issue, modify your auk_dspip_avalon_streaming_controller_hpfir.v/vhd file contained in your project folder/<fir_variation_folder>.  In this file, at the bottom of the architecture block, just before the end struct; line, add the follow assignment:

    source_packet_error <= sink_packet_error;

    This issue will be fixed in a future release of Quartus II software.

    Related Products

    This article applies to 4 products

    Stratix® V GX FPGA
    Stratix® V GT FPGA
    Stratix® V GS FPGA
    Stratix® V E FPGA