Article ID: 000077335 Content Type: Troubleshooting Last Reviewed: 02/01/2023

What is the supported frequency range for the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP reference clock?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Stratix® 10 E-Tile Transceiver Native PHY
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    Description

    The E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP in the Intel Quartus® Prime Pro Edition Software versions 18.1.1 and before shows the supported reference clock frequency range between 125 MHz - 500 MHz.

    The supported reference clock frequency range supported by the E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is intended to be 125 MHz to 700 MHz.

    Resolution

    125 MHz to 700 MHz reference clocks support for E-Tile Transceiver Native PHY Intel® Stratix® 10 FPGA IP is supported in the Intel Quartus® Prime Pro Edition Software versions 22.4.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs