Article ID: 000075387 Content Type: Error Messages Last Reviewed: 06/16/2017

Error (10161): Verilog HDL error at rcfg_sdi_cdr.sv(44): object "altera_xcvr_native_a10_reconfig_parameters_CFG0" is not declared. Verify the object name is correct. If the name is correct, declare the object.

Environment

  • Intel® Quartus® Prime Pro Edition
  • SDI II Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see the above error during Analysis & Elaboration, if you are using the SDI RX design files from the SDI II IP core generated example design in Quartus® Prime software version 17.0. This is because the rcfg_sdi_cdr module is unable to locate the transceiver reconfiguration parameter packages by default. 

    Resolution

    Add the following Quartus II Settings File (.qsf) assignment to your QSF file:

    set_global_assignment -name SYSTEMVERILOG_FILE <file directory>/rcfg_sdi_cdr.sv -library sdi_rx_sys_altera_xcvr_native_a10_170

    You may refer to the IP generated example design QSF file for further details. This information will be updated into the future release of the design example user guide.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs