Migrating Offloading Software to Intel® Xeon Phi™ Processor

Introduction

The Intel® Xeon Phi™ x100 coprocessor introduced the concept of many core architecture with more than 57 processor cores in one package, 4-way multithreading and 512-bit vector instructions (Intel® Initial Many Core Instructions – Intel® IMCI). It enabled many usage models and can still be found in numerous machines.

Many different programming models have been adopted for Intel® Xeon Phi™ x100 coprocessor and significant investments have been made into modernization of applications running on it.

There are three main programming models or types of applications that use Intel® Xeon Phi™ x100 coprocessor:
• Native applications running on Intel® Xeon Phi™ x100 coprocessors.
• Distributed applications which use Message Passing Interface (MPI) to communicate between processes (called MPI ranks) on Intel® Xeon Phi™ x100 coprocessors and platforms with Intel® Xeon® processors.
• Offload applications running on platforms with Intel® Xeon® processors and using compiler offloading features (Intel® Language Extensions for Offload or OpenMP* target directives) or communicating via Symmetric Communication Interface (SCIF) to execute code on Intel® Xeon Phi™ x100 coprocessors.