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  1. Intel® Products
  2. Altera® FPGA, SoC FPGA and CPLD
  3. Altera® FPGA Development Kits
  4. MAX® FPGA Development Kits
  5. MAX® 10 FPGA Development Kits

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MAX® 10 FPGA Development Kit

The MAX® 10 FPGA Development Kit provides a full featured design platform built around a 50 K logic elements (LEs) MAX® 10 FPGA, optimized for system level integration with on-die analog-to-digital converter (ADC), dual-configuration flash, and DDR3 memory interface support.

  • Overview
MAX® 10 FPGA development board
MAX® 10 FPGA development board block diagram

With this development board, you can:

  • Develop designs for the 10M50D, F484 package FPGA.
  • Measure the performance of the MAX® 10 FPGA analog-to-digital block conversion.
  • Interface MAX® 10 FPGAs to DDR3 memory at 300 MHz performance.
  • Run embedded Linux using the Nios® II processor.
  • Interface to daughtercards and peripherals using HSMC and Digilent Pmod compatible connectors.
  • Measure FPGA power (VCC_CORE and VCC_IO) using the power monitor graphical user interface (GUI).
  • Reuse the kit’s PCB board and schematic as a model for your design.

Table 1. Ordering Information

Ordering Code Check Distributor Availability Device
DK-DEV-10M50-C

Mouser

DigiKey

10M50DAF484I6G
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Table 2. Development Kit Contents and Features

Parameters Hardware
Device

MAX® 10 FPGA (10M50D, dual supply, F484 package)

MAX II CPLD – EPM1270M256C4N (On-board Altera® FPGA Download Cable II)

Features and Connectors

Communication ports

  • Two Gigabit Ethernet (GbE) RJ-45 ports
  • One mini-USB 2.0 UART
  • One HDMI video output
  • One universal HSMC connector
  • Two 12-pin Digilent Pmod compatible connectors (see Pmod compatible expansion cards)

Analog

  • Two MAX® 10 FPGA ADC SMA inputs
  • 2x10 ADC header
  • Potentiometer input to ADC
  • One external 16 bit digital-to-analog converter (DAC) device with SMA output

Mini-USB cable for on-board Altera® FPGA Download Cable II

Switches, push buttons, jumpers, and status LEDs

Memory

64Mx16 1 GB DDR3 SDRAM with soft memory controller

128Mx8 1 GB DDR3 SDRAM with soft memory controller

512 MB quad serial peripheral interface (quad SPI) flash memory

Cables and Adapters 2A power supply and cord
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Table 3. Documentation

Design Files

Content Descriptions

User Guide ›

Information about the MAX® 10 FPGA Development Kit hardware and board setup including how to use included software.

Version: 2015.06.26

Installer Package

DK-DEV-10M50-A (v22.1std.0 or higher) ›

DK-DEV-10M50-C (v22.1std.0 or higher) ›

A single installation file containing:

  • User Guide - Contains the user guide
  • Design Files - Contains schematics, and layout, Assembly, Bill of Materials
  • Board Test System: BTS GUI, Power GUI and Clock GUI
  • Golden Top project for pinout assignments management
  • Design Examples: Memory, XCVR, GPIO and PCIe Gen4

Download and unzip the Design Files first, then install the Board Test System.

Note: You will need to install Quartus® Prime Lite Edition software.

Board Schematic

DK-DEV-10M50-C
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Additional Resources

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