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IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 6, JUNE 2004 High- /Metal–Gate Stack and Its MOSFET Characteristics Robert Chau, Senior Member, IEEE, Suman Datta, Member, IEEE, Mark Doczy, Brian Doyle, Jack Kavalieros, and Matthew Metz Abstract—We show experimental evidence of surface phonon dielectric being the primary cause scattering in the high- of channel electron mobility degradation. Next, we show that midgap TiN metal–gate electrode is effective in screening phonon scattering in the high- dielectric from coupling to the channel underinversionconditions,resultinginimprovedchannelelectron mobility. We then show that other metal–gate electrodes, such as the ones with n+ and p+ work functions, are also effective in improving channel mobilities to close to those of the conventional SiO /poly-Si stack. Finally, we demonstrate this mobility degra- 2 dation recovery translates directly into high drive performance /metal–gate CMOS transistors with desirable threshold on high- voltages. Index Terms—Atomic layer deposition (ALD), CMOS transis- dielectric, metal–gate elec- tors, Hafnium Oxide (HfO2), high- trode, remote phonons. I. INTRODUCTION HE SILICON industry has been scaling silicon dioxide (SiO ) aggressively for the past 15 years for low-power, T high-performance CMOS transistor applications. Recently, with physical thickness of 1.2 nm has been implemented SiO in the 90-nm logic technology node [1]. In addition, research have been transistors with 0.8-nm (physical thickness) SiO demonstrated in the laboratory [2], [3]. However, continual gate dielectric ( being gate oxide scaling will require high- the dielectric constant) since the gate oxide leakage in SiO is increasing with reducing physical thickness and SiO will eventually run out of atoms for further scaling. The majority gate dielectrics investigated are Hf-based and of the high- Zr-based [4]–[6]. Both poly-Si and metals are being evaluated gatedielectrics[7],[8]. asthegateelectrodesforthehigh- Therearemanychallengesreportedinliteratureinreplacing with high- dielectrics for high-performance CMOS ap- SiO plications[9]–[11].IthasbeenreportedthatFermi-levelpinning /poly-Sitransistorscauseshighthresholdvoltages atthehigh- in MOSFET transistors [9], resulting in poor transistor drive /poly-Sitran- performance.Ithasalsobeenreportedthathigh- sistors exhibit severely degraded channel mobility [12], [13]. A proposed model is that the mobility degradation is due to thecouplingoflow-energysurfaceoptical(SO)phononmodes dielectric to the in- arising from the polarization of the high- version channel charge carriers [14], and that metal–gate may ManuscriptreceivedFebruary26,2004;revisedMarch18,2004.Thereview of this letter was arranged by Editor B. Yu. The authors are with Components Research, Logic Technology Develop- ment, Intel Corporation, Hillsboro, OR 97124 USA (e-mail: robert.s.chau@ Digital Object Identifier 10.1109/LED.2004.828570 ’s SO phonons from be more effective in screening the high- coupling to the channel under inversion conditions [14], [15]. Ontheotherhand,metal–gateelectrodeswiththecorrectwork functionsarerequiredforhigh-performanceCMOSlogicappli- cations on bulk Si [16]. To understand the various physical scattering mechanisms dielectric, that limit channel electron mobility in the high- we experimentally measure the effective inversion electron mobility as a function of temperature and transverse electric in the HfO /poly-Si stack, and conclude that field surface phonon scattering is the primary cause of electron .Wethenshowthattheuseof mobilitydegradationintheHfO midgap TiN metal–gate electrode is effective in screening the remote phonon electron interaction and improves the channel electron mobility. In addition, we show that this is generally true of other metal–gate electrode materials system with n+ andp+workfunctions,andthattheexpectedhighdrivecurrent performance for both the n-channel and p-channel MOSFET’s withthedesirablethresholdvoltagesisindeedobtained. Read the full 408.

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