Design Guide Addendum: Intel® Xeon® processor and Intel® E750 Chipset compatible platform uniprocessor, angled and single channel DDR guidelines.
Addendum document provides uniprocessor design guidelines, angled Double Data Rate guidelines, and single channel DDR guidelines for the Intel® Xeon® processor and Intel® E7500 Chipset compatible platform.
Intel® Xeon® Processor with 512-KB L2 Cache and Intel® E7500 Chipset Platform Design Guide with layout/routing guidelines, EMI/Mechanical design.
Discusses layout and routing guidelines, power delivery, hub interface, and EMI and mechanical design considerations for the Intel® Xeon® processor with 512-KB L2 Cache and Intel® E7500 chipset platform.
This datasheet is intended for Original Equipment Manufacturers and BIOS vendors that create ICH3-Server based products. This datasheet assumes a working knowledge of the vocabulary and principles of USB, IDE, AC ’97, SMBus, PCI, ACPI, and LPC.
Specification Update, 2006: Intel® 82801CA I/O Controller Hub 3 (ICH3-S), clarifications, changes, and documentation errata.
Specification updates for the Intel® 82801CA I/O Controller Hub 3 (ICH3-S), including device and documentation errata, specification clarification, and changes.
Specification Update: Intel® 82870P2 PCI/PCI-X 64-bit Hub 2 covers document changes, errata, specification changes and clarifications.
This document is a compilation of device and document errata and specification clarifications and changes, and is intended for hardware system manufacturers and for software developers of applications, operating system, and tools.
Contains MCH signals, registers, DC electrical characteristics, ballout, package dimensions, and component testability for Intel E7500.
This document describes the MCH signals, registers, DC electrical characteristics, ballout, package dimensions, and component testability. The major functional blocks of the MCH are described.
Thermal Design Guide: Intel® E7500/E7501/E7505 chipset MCH components, operating limits and a reference thermal solution.
This document specifies the operating limits of the Intel® E7500/E7501/E7505 chipset MCH components and describes a reference thermal solution that meets the thermal specifications of the Intel® E7500/E7501/E7505 chipset MCH components.
Thermal and Mechanical Design Guide: Intel® E7500/E7505 Chipset Memory Controller Hub.
Discusses the packaging technology, thermal simulation, specifications, metrology, reference thermal solutions, and component suppliers for the Intel® E7500 and Intel® E7505 chipsets.