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Intel® Xeon® Processor C5500/C3500 Series NTB: Guide

Introduction
The task of the non-transparent bridge (NTB) is to provide electrical isolation between two subsystems, local and remote, while providing access to a memory window into each subsystem. The NTB is seen as a root complex integrated endpoint (RCiEP) or a PCI Express* (PCIe*) endpoint, exposing a Type 0 PCIe configuration space. The RCiEP can be flexibly configured for three different usage models. The first usage model fits existing customer requirements: An Intel® Xeon® processor C5500/C3500 series local host’s secondary side of the NTB is connected to a Intel Xeon processor remote host’s secondary side of the NTB, referred to as the back-to-back (B2B)model.

Read the full Intel® Xeon® Processor C5500/C3500 Series NTB Programming Guide.

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